AMD's MI400 disclosure — and the data-center accelerator pricing curve.

MI400 specifications and the Instinct roadmap update

The MI400 dual-chiplet GPU configuration represents the structural architectural change against the prior-generation MI300X and MI325X platforms, which used a single larger compute die rather than the dual-chiplet design. The architectural shift has been driven by three structural factors: the manufacturing economics at the TSMC N2P node, where the smaller per-chiplet die size of 130 square millimetres improves the yield curve substantially against an equivalent single-die configuration; the design flexibility that the dual-chiplet approach provides for the higher-binned MI400X variant that the company has been positioning against the most demanding workloads; and the broader chiplet-design experience that AMD has been accumulating across the prior Epyc CPU generations and the broader Ryzen platform that the company has been shipping into the broader commercial customer base.

The per-chiplet specifications at the MI400 have been disclosed in detail at the Computex keynote. Each chiplet operates at approximately 2,900 teraFLOPS at FP8 sparse and 1,450 teraFLOPS at FP16 dense, with the dual-chiplet aggregate at 5,800 teraFLOPS FP8 sparse and 2,900 teraFLOPS FP16 dense. The compute envelope at the lower-precision INT4 and INT2 operands has been more aggressively expanded against the prior generation, with the dual-chiplet aggregate at INT4 reaching approximately 11,600 teraOPS and at INT2 reaching approximately 23,200 teraOPS. The lower-precision compute envelope has been the principal architectural commitment that AMD has been making against the inference-workload tier, where the broader industry trend toward quantised inference deployment has been the dominant workload-evolution variable across 2025 and 2026.

The memory configuration at the MI400 platform — up to 384 gigabytes of HBM4 with approximately 8 terabytes-per-second aggregate bandwidth — represents the largest per-accelerator memory configuration in the broader hyperscaler-class accelerator market through Q2 2026. The Blackwell B200's 192-gigabyte HBM3e configuration and the GB200's 384-gigabyte configuration across the dual-GPU Grace Blackwell module represent the principal Nvidia comparison points, and the MI400's per-GPU 384-gigabyte memory configuration matches the GB200 dual-GPU module on a per-GPU basis. The memory bandwidth at the MI400 — 8 terabytes-per-second against the Blackwell B200's 8.0 terabytes-per-second — has converged to parity with the leading-edge Nvidia platform on the memory subsystem performance characteristics. The implication for the inference workload class is that the MI400's structural performance characteristics at the memory-bound workload regime have been substantially equalised against the Nvidia platform comparison.

The Instinct roadmap update at the Computex keynote has been the broader commercial commitment that AMD has been positioning across the next eighteen months. The roadmap includes the MI400 production qualification clearance at TSMC Fab 20 in late June 2026, the MI400 commercial-availability ramp through Q3 and Q4 2026 against the four named hyperscaler customers, the MI400X higher-binned variant for Q1 2027 commercial availability, and the MI500 next-generation platform that the company has scheduled for sampling in late 2027 and volume production in H1 2028. The roadmap commitments place the MI500 platform on a TSMC N2P refinement node that the broader foundry community has been characterising as the A14 follow-on rather than a third-generation 2nm process, and the platform represents AMD's response to the Nvidia Rubin platform that is scheduled for the same commercial-availability window.

The structural posture that the Instinct roadmap commits AMD to has been the most aggressive that the company has run in the platform's commercial history. The single-source manufacturing commitment at TSMC for the MI400 represents a concentrated supply-side bet that the company has been willing to make on the basis of the prior MI300 dual-source experience, in which the company concluded that the qualification overhead at the secondary foundry source had been disproportionate to the supply-side risk hedge. The roadmap also commits the company to a substantially expanded ROCm software-stack investment that has been the principal organisational reorientation that the company's software organisation has been managing against. The combined commitment — supply-side concentration plus software-stack expansion — represents the structural posture that will determine whether the company can capture the meaningful market-share expansion against the Nvidia accelerator dominance that the broader analyst community has been forecasting against the next two years.

The named customer wins — Microsoft Azure, Oracle Cloud, Meta, Crusoe

The four named customer commitments at the MI400 commercial-availability ramp have been the principal commercial proof points that AMD has been positioning against the broader hyperscaler accelerator market. The customer-base composition reflects a strategic posture that the company's commercial organisation has been characterising as the principal-cloud-and-anchor-enterprise customer model, with the four named customers representing the principal hyperscaler relationships that the company has been building against across the prior two years and the broader enterprise-direct customer commitments that the prior MI300X commercial deployment has anchored.

Microsoft Azure has been the largest single-customer commitment at the MI400 ramp, with the company committing to a multi-quarter procurement structure that has been characterised in the published Microsoft commentary as targeting approximately 95,000 MI400 units across Q3 and Q4 2026. The Microsoft commitment positions the MI400 platform principally against the Azure OpenAI Service inference-workload tier, with the broader Microsoft 365 Copilot and the company's internal AI workloads also drawing against the platform's deployed capacity. The commercial structure of the Microsoft commitment has been a multi-year framework agreement that provides AMD with the volume commitments to support the production-capacity allocation at TSMC, with the corresponding commitments from Microsoft against the broader Azure infrastructure deployment that anchors the AMD platform.

Oracle Cloud Infrastructure has been the second-largest customer commitment at the MI400 ramp, with the company committing to approximately 42,000 MI400 units across Q3 and Q4 2026. The Oracle commitment positions the MI400 platform principally against the OpenAI Project Stargate framework infrastructure that the company has been building, with the cost-per-FLOP advantage of the AMD platform being the principal commercial argument that has been driving the customer-side commitment. Oracle's broader strategic posture toward the AMD accelerator platform has been characterised in the company's published commentary as a multi-platform infrastructure strategy that complements the Nvidia accelerator commitments with the cost-optimised AMD platform deployment, with the principal workload-class allocation being the inference-workload tier where the cost-per-token economics have been the most directly competitive against the broader hyperscaler customer base.

Meta Platforms has been the third-largest customer commitment at the MI400 ramp, with the company committing to approximately 36,000 MI400 units across Q3 and Q4 2026. The Meta commitment positions the MI400 platform against the company's broader inference infrastructure across the Llama-family deployment, with the cost-per-FLOP economics being the principal driver of the customer-side commitment. The Meta commitment runs in parallel to the company's broader MTIA v3 custom-silicon programme and the company's Nvidia Blackwell direct procurement that totalled approximately 24,000 units at Q1 2026 — the published Meta commentary has characterised the multi-platform commitment as the principal infrastructure-deployment strategy that the company has been operating against, with the workload-class allocation across the three platforms reflecting the differentiated performance and cost characteristics at the respective workload tiers.

Crusoe Energy has been the fourth named customer commitment at the MI400 ramp, with the company committing to approximately 18,000 MI400 units across Q3 and Q4 2026. The Crusoe commitment positions the MI400 platform principally against the company's training-as-a-service product line, with the cost-per-FLOP economics being the principal commercial proposition that the company's customer base has been responsive to. The Crusoe commitment reflects the broader strategic posture that the neocloud customer segment has been operating against, with the customer-side decision to commit to the AMD platform being principally driven by the cost-per-FLOP economics rather than the structural performance differentiation that the leading-edge customer base prioritises. The Crusoe MI400 deployment represents the largest single-customer commitment at the neocloud customer segment, against a broader neocloud market that has been substantially more cautious in its AMD platform commitments than the hyperscaler customer base has been.

ROCm 7 and the software-ecosystem story

The ROCm 7 software stack release that AMD launched alongside the MI400 disclosure represents the most material software-ecosystem investment that the company has made across the platform's commercial history. The principal commercial constraint on the broader AMD accelerator-platform adoption has been the structural ecosystem gap against the Nvidia CUDA software environment, with the customer-side commitment to the AMD platform being principally constrained by the broader commercial library coverage and the deployment-toolchain maturity that the alternative Nvidia platform has been delivering across the prior decade. The ROCm 7 release has been positioned as the principal commercial response to that ecosystem gap, with the structural improvements being concentrated against the customer-side deployment workflow and the broader compatibility with the PyTorch ecosystem that has been dominating the broader machine-learning software environment.

The structural improvements at the ROCm 7 release have been concentrated against three principal workstreams. The PyTorch native-integration workstream has expanded against the prior ROCm 6 baseline, with the PyTorch 2.5 release supporting the AMD platform as a first-tier deployment target alongside the CUDA-based Nvidia platform deployment. The Hugging Face Transformers library — the principal commercial-deployment library at the broader frontier-AI customer base — has expanded its AMD platform support to first-tier deployment compatibility, with the company's published commentary characterising the deployment workflow at the AMD platform as approximately matched to the Nvidia platform deployment workflow on the principal Hugging Face model architectures. The vLLM and TensorRT-LLM equivalent serving libraries have expanded their AMD platform support, with the AMD-native equivalent being the ROCm-LLM serving library that the company has been developing across the prior 18 months.

The customer-side adoption of the ROCm 7 software stack has been the principal commercial variable that the company has been positioning against. The published Microsoft Azure commentary has characterised the ROCm 7 deployment at the company's Azure OpenAI Service infrastructure as approximately matched to the equivalent Nvidia deployment workflow on the principal inference-workload tier, with the migration path being principally a configuration change at the underlying inference-serving infrastructure rather than a structural rewrite at the model implementation. The Oracle Cloud Infrastructure commentary has characterised the ROCm 7 deployment as the principal commercial enabler of the company's multi-platform infrastructure strategy, with the cost-per-FLOP economics of the AMD platform being substantially more attractive on the inference-workload tier once the software-stack migration overhead has been resolved.

The principal remaining ecosystem gap against the Nvidia CUDA environment has been concentrated at the broader commercial library coverage that the long-tail of commercial-deployment scenarios requires. The CUDA ecosystem has been the principal investment target of the broader machine-learning software-tools commercial market across the prior decade, with the resulting commercial library coverage at the CUDA environment being substantially more extensive than at the AMD ROCm equivalent. The ROCm 7 release has been substantially closing the gap on the principal commercial libraries that the dominant workload classes require, but the long-tail coverage has remained a meaningful ecosystem differentiation that the broader customer base has been factoring into the platform-commitment decision. The AMD organisation has been characterising the long-tail ecosystem gap as the principal investment focus for the broader ROCm 8 release that the company has scheduled for late 2027, with the principal commitment being to close the long-tail coverage against the Nvidia CUDA environment across the broader commercial-library landscape.

The implication of the ROCm 7 software-stack story for the broader market-share dynamics has been that the structural ecosystem gap that had constrained the AMD accelerator platform's commercial expansion has been substantially closed at the principal commercial-deployment scenarios. The customer-side commitment to the AMD platform has been substantially less constrained by the software-ecosystem variables than it had been at the prior MI300X commercial deployment cycle, with the principal commercial variable being the cost-per-FLOP economics and the supply-side reliability rather than the software-stack maturity. The structural implication is that the next 18 months will be the principal commercial test of whether the ROCm 7 ecosystem improvements have translated into the broader customer-base commitments at the scale that the company has been positioning against, with the named customer wins at Microsoft, Oracle, Meta, and Crusoe being the leading commercial proof points.

The pricing posture against Nvidia Blackwell — and against Rubin

The published MI400 pricing structure has been the most aggressive that AMD has run in the platform's commercial history, with the per-GPU pricing at the hyperscaler customer base settling at approximately $28,000 against the Nvidia Blackwell B200's $35,000 list pricing — a 20-per-cent discount against the principal Nvidia competitive comparison. The discount structure has been concentrated against the cost-per-FLOP economics that the broader hyperscaler customer base has been increasingly focused on against the prior procurement-cycle decisions, with the company's commercial organisation positioning the MI400 platform as the principal cost-optimised alternative to the Nvidia accelerator platform across the broader inference-workload tier. The pricing posture has been characterised in the published Microsoft and Oracle commentary as the principal commercial argument that has been driving the customer-side commitment.

The pricing comparison against the Nvidia Rubin platform — which the company has scheduled for late 2026 sampling and H1 2027 volume production — has been more complex because the Rubin platform's published pricing of approximately $42,000 per GPU represents a substantial increase against the Blackwell B200 list. The MI400's $28,000 pricing against the Rubin's $42,000 represents a 33-per-cent discount, with the broader cost-per-FLOP economics depending on the Rubin's published performance characteristics at the late-2026 commercial availability window. The MI400's 5,800 teraFLOPS FP8 sparse against the Rubin's 5,200 teraFLOPS FP8 sparse — a 12-per-cent throughput advantage at the AMD platform — combined with the 33-per-cent pricing discount produces approximately a 50-per-cent cost-per-FLOP advantage at the AMD platform against the Rubin comparison, on the published throughput figures.

The cost-per-FLOP economics across the principal hyperscaler customer base have been the principal variable that the customer-side commitment has been driven by. The Microsoft commentary at the MI400 commitment announcement has characterised the cost-per-FLOP economics at the MI400 platform as approximately 1.6 times more attractive than the equivalent Nvidia Blackwell deployment on the workload-class allocation that Microsoft has been deploying the MI400 platform against. The Oracle commentary has characterised the cost-per-FLOP economics as approximately 1.5 times more attractive on the inference-workload tier that Oracle has been principally deploying the platform against. The named customer commentary has converged on a cost-per-FLOP advantage of approximately 1.5 to 1.7 times against the equivalent Nvidia Blackwell deployment, with the resulting commitment volumes reflecting the cost-economic argument at scale.

The structural pricing posture that AMD has been running against the broader hyperscaler customer base reflects a strategic commitment that the company's commercial organisation has been characterising as the principal-volume-and-anchor-customer strategy. The published commentary from Lisa Su, AMD's CEO, at the Computex keynote characterised the MI400 commercial commitment as the principal volume-acceleration vehicle for the broader accelerator platform across the next 18 months, with the cost-per-FLOP economics being the principal commercial differentiator against the broader Nvidia dominance at the hyperscaler customer base. The strategic posture has been the most aggressive that the company has run in the platform's commercial history, and the H2 2026 customer-commitment volumes will be the principal commercial test of whether the cost-economic positioning has produced the corresponding market-share expansion that the strategic posture has been positioning against.

The implication of the pricing posture for the broader Nvidia commercial trajectory has been that the company's pricing discipline through H2 2026 will be tested by the AMD platform's aggressive cost-economic positioning. The Nvidia commercial organisation has been characterising the Blackwell platform's pricing in the published commentary as principally driven by the supply-constrained allocation environment that the platform has been operating against, with the corresponding implication that the Rubin platform's pricing through late 2026 and H1 2027 may be subject to more aggressive competitive pressure than the prior platform transitions have produced. The published Bernstein analyst commentary has characterised the H2 2026 pricing environment at the broader hyperscaler accelerator market as the most competitive that has been observed across the prior four years, with the AMD MI400 platform being the principal driver of the competitive pressure.

Supply chain — TSMC 2nm versus Samsung 2nm

The AMD MI400 supply-chain commitment to TSMC's N2P process at Fab 20 in Hsinchu has been a single-source decision that the company has been willing to commit against on the basis of the prior MI300X experience with the dual-foundry strategy. The prior MI300X platform ran a dual-source manufacturing structure with TSMC and Samsung Foundry, with the corresponding qualification overhead at the secondary foundry source being characterised by the company's manufacturing organisation as approximately six to nine months of net time-to-market across the development cycle. The MI400 single-source decision has been driven by the strategic priority of compressing the time-to-market against the H2 2026 customer-commitment window, with the corresponding supply-side concentration risk being absorbed against the leverage that the concentrated commitment provides at the foundry-side allocation negotiations.

The Samsung Foundry alternative on the SF2 process node has been an option that AMD has been actively evaluating across the prior 18 months, but the company's manufacturing organisation has been characterising the Samsung Foundry yield curve at the SF2 node as substantially below the TSMC N2P equivalent at comparable design rules. The Samsung Foundry posture toward winning the MI400 design-in has been substantial across the negotiation cycle, with the company offering pricing terms and allocation guarantees that have been characterised in the published commentary as substantially more aggressive than TSMC has been willing to match. The AMD decision to commit to TSMC despite the Samsung pricing posture has been driven by the yield-curve confidence and the broader process-technology maturity that the TSMC foundry has been delivering across the prior generations, with the resulting commercial commitment reflecting the time-to-market priority over the cost-economic optimisation.

The CoWoS-S advanced-packaging commitment at the MI400 platform represents the principal capacity constraint that the company has been managing against. The CoWoS-S capacity at TSMC has been the principal binding constraint on the broader leading-edge accelerator manufacturing across 2025 and 2026, with the published Nvidia commentary characterising the CoWoS capacity allocation as the principal supply-side variable that has been determining the company's accelerator-shipment quarterly cadence. The AMD CoWoS-S allocation through the MI400 ramp has been negotiated against the broader TSMC packaging capacity envelope, with the company's commitments through H2 2026 totalling approximately 36,000 wafers of CoWoS-S packaging — substantially smaller than the Nvidia equivalent allocation but representing a material commitment against the broader packaging-capacity environment.

The supply-side reliability of the TSMC commitment has been the principal variable that the customer-side commitment has been factoring into the platform-allocation decision. The published Microsoft and Oracle commentary at the MI400 customer-commitment announcement has characterised the AMD supply-side reliability as a principal factor in the customer-side allocation decision, with the structural supply-side concentration at TSMC being viewed as a positive factor against the alternative dual-source supply structure that the prior MI300X platform ran. The customer-side commentary has converged on the assessment that the AMD platform's supply-side reliability has been substantially improved against the prior MI300X commercial cycle, with the corresponding customer-side willingness to commit substantial procurement volumes to the platform reflecting the improvement.

The structural implication of the supply-chain posture for the broader competitive dynamics has been that the AMD platform's commercial trajectory will be constrained by the TSMC Fab 20 N2P allocation through the H2 2026 and H1 2027 commercial-deployment window. The company's allocation at Fab 20 — approximately 4,800 wafer starts per month — represents approximately 11 per cent of the foundry's total Fab 20 phase-one capacity, against the Apple commitment at approximately 28 per cent and the Nvidia commitment at approximately 24 per cent. The AMD allocation expansion through H1 2027 will be constrained by the foundry-side allocation negotiations against the broader customer-base demand environment, with the structural commitment being the principal commercial variable that will determine whether the company can deliver the volume commitments to the H2 2026 customer base across the longer-term commercial cycle.

What to watch

The MI400 commercial ramp through H2 2026 will be the principal commercial test of AMD's strategic posture against the broader accelerator market. The named customer commitments at Microsoft, Oracle, Meta, and Crusoe are the leading commercial proof points, but the broader market-share dynamics will continue to develop through the platform's commercial life.

• Whether the MI400 production qualification clearance lands on the published late-June 2026 schedule; the qualification clearance is the principal gating variable for the H2 2026 customer commitments, and any slippage would compress the customer-side deployment timeline and affect the broader competitive positioning against the Nvidia Blackwell platform.
• Whether the ROCm 7 software stack's commercial-deployment performance at the named customer base matches the published expectations; the principal commercial variable at the customer-side deployment has been the software-stack maturity at the production-deployment scale, and the H2 2026 deployment-cycle data will be the principal evidence of whether the ROCm 7 ecosystem improvements have translated into the corresponding commercial outcomes.
• Whether the AMD platform's commercial expansion at the broader hyperscaler and neocloud customer base extends beyond the four named customers through H2 2026; the customer-base expansion at the next-tier hyperscaler customers — Google Cloud at the third-party AMD allocation, AWS at any AMD platform commitments — would be the principal indicator of the broader market-share dynamics at the platform's commercial trajectory.
• Whether Nvidia's pricing posture on the Rubin platform through late 2026 and H1 2027 demonstrates the competitive pressure that the AMD platform's aggressive cost-economic positioning has been positioning against; the structural pricing discipline at the Nvidia commercial organisation through the platform-transition cycle will be the principal evidence of whether the AMD cost-economic posture has translated into the broader competitive pricing-environment dynamics.
• Whether the broader inference-workload tier at the hyperscaler customer base shifts materially toward the AMD platform across H2 2026 and H1 2027; the inference-workload tier has been the principal addressable market at the AMD platform's cost-economic positioning, and the customer-side workload-class allocation across the named customer base will be the principal commercial indicator of whether the structural inference-versus-training accelerator split is shifting in the direction that the AMD strategic posture has been positioning against.

Frequently asked

What is the MI400X variant, and how does it differ from the standard MI400?

The MI400X is the higher-binned variant of the MI400 platform that AMD has scheduled for Q1 2027 commercial availability, with a substantially enhanced compute envelope against the standard MI400. The principal differentiation is at the peak compute throughput — approximately 7,200 teraFLOPS FP8 sparse against the standard MI400's 5,800 teraFLOPS — and the slightly higher memory bandwidth of approximately 9.2 terabytes-per-second against the standard 8 terabytes-per-second. The MI400X is positioned against the most demanding training-workload tier where the absolute performance envelope is the principal procurement variable, with the standard MI400 positioned against the broader inference-workload tier where the cost-per-FLOP economics are the principal driver. The MI400X pricing is expected to settle at approximately $34,000 per GPU at the hyperscaler customer base, against the standard MI400's $28,000.

How does the MI400 deployment at Microsoft Azure interact with the company's broader accelerator infrastructure?

Microsoft's MI400 deployment runs in parallel to the company's Nvidia Blackwell deployment at approximately 118,000 units in Q1 2026 and the Azure Maia custom-silicon deployment at approximately 320,000 units across the Wisconsin, Iowa, and Texas footprints. The MI400 deployment is positioned principally against the Azure OpenAI Service inference-workload tier, with the cost-per-FLOP economics being the principal driver of the customer-side workload-class allocation. The multi-platform infrastructure strategy reflects Microsoft's broader commitment to a diversified accelerator-platform portfolio that provides commercial leverage and supply-chain resilience against any single-platform commitment. The published commentary from Microsoft has characterised the multi-platform strategy as the principal infrastructure-deployment approach that the company has been operating against across the broader AI-infrastructure investment cycle.

What is the ROCm 7 software stack, and why has it been the principal commercial differentiator that AMD has been positioning?

ROCm 7 is the latest release of AMD's software stack for the Instinct accelerator platform, with the principal structural improvements concentrated against the PyTorch native-integration, the Hugging Face Transformers library compatibility, and the AMD-native vLLM equivalent serving library. The principal commercial differentiator has been the substantial closure of the ecosystem gap against the historical Nvidia CUDA software-environment dominance, with the customer-side deployment workflow at the AMD platform being approximately matched to the equivalent Nvidia deployment workflow on the principal commercial-deployment scenarios. The principal remaining ecosystem gap has been concentrated at the long-tail commercial library coverage, which AMD has been characterising as the principal investment focus for the ROCm 8 release scheduled for late 2027.

Why did AMD choose TSMC over Samsung Foundry for the MI400 manufacturing despite Samsung's aggressive pricing posture?

The decision was driven principally by the yield-curve confidence and the broader process-technology maturity at the TSMC N2P node, with the Samsung Foundry SF2 node having been characterised by AMD's manufacturing organisation as substantially below the TSMC equivalent at comparable design rules. The prior MI300X dual-source experience with TSMC and Samsung Foundry produced approximately six to nine months of net time-to-market overhead from the qualification at the secondary foundry source, and the strategic priority of compressing the time-to-market against the H2 2026 customer-commitment window made the single-source TSMC commitment the principal commercial choice. The corresponding supply-side concentration risk has been absorbed against the leverage that the concentrated commitment provides at the foundry-side allocation negotiations.

How does the MI400 platform fit into the broader inference-versus-training accelerator split?

The MI400 platform has been positioned principally against the inference-workload tier across the named customer base, with the cost-per-FLOP economics being the principal commercial argument that has been driving the customer-side commitment. The structural implication is that the broader inference-workload tier at the hyperscaler customer base has been shifting toward a more competitive multi-platform allocation across Nvidia, AMD, and the hyperscaler custom-silicon programmes — AWS Trainium, Azure Maia, Google TPU. The training-workload tier has remained more concentrated at the Nvidia accelerator platform because the structural ecosystem advantages at the leading-edge training environment have been more difficult to displace, with the principal counter-example being the JAX-and-TPU customer base at Google. The MI400 platform's commercial trajectory will be principally tested at the inference-workload tier through H2 2026 and H1 2027, with the broader market-share dynamics depending on whether the named customer commitments expand against the broader hyperscaler customer base.

What is the MI500 roadmap commitment, and how does it compete against the Nvidia Rubin platform?

The MI500 is the next-generation Instinct platform that AMD has scheduled for sampling in late 2027 and volume production in H1 2028, on a TSMC N2P refinement node that the broader foundry community has been characterising as the A14 follow-on. The platform represents AMD's response to the Nvidia Rubin platform that is scheduled for the same commercial-availability window, with the principal competitive variables being the cost-per-FLOP economics, the absolute performance envelope, and the software-stack maturity at the production-deployment scale. The MI500 platform's competitive positioning will depend on the resolution of the H2 2026 and H1 2027 commercial-deployment cycle at the MI400 platform, with the broader market-share dynamics at the MI400 cycle being the principal indicator of whether the MI500 platform can capture the broader accelerator-market share that AMD has been positioning against.